1. Field of the Invention
The present invention relates to structures for protecting integrated circuits against electrostatic discharges.
2. Discussion of the Related Art
FIG. 1 is a simplified top view of an integrated circuit chip. The integrated circuit comprises a central portion 1 connected to an assembly of metal pads 3 arranged at the chip periphery and intended to provide connections to the outside. Central portion 1 comprises all the components enabling the integrated circuit to perform desired functions. Some of pads 3 are intended to receive positive (VDD) and negative (VSS) supply voltages. Positive and negative supply rails 5 and 7 are generally provided all around the circuit. The other pads 3 are especially intended for receiving and/or for providing input-output signals. The entire circuit is covered with an insulating layer which only leaves access to terminals connected to pads 3, and may be placed in a package comprising lugs connected to pads 3 or balls connected to these pads.
Such a circuit generally receives and/or provides signals of low voltage level (for example, from 0.6 to 3 V) and low current intensity (for example, from 1 μA to 10 mA), and is likely to be damaged in the occurrence of overvoltages or overcurrents between terminals of the package. Overvoltages may occur during the manufacturing or assembly phase, before the circuit is assembled in a device (for example, on a printed circuit board), in the occurrence of electrostatic discharges linked to the manipulation of the circuits by tools or by hand. Such overvoltages may reach several thousands of volts and destroy elements of the circuit.
It is thus provided to associate, with each pad 3, a protection structure which generally takes up a ring 9 arranged between pads 3 and central portion 1 of the chip. The protection structure should be capable of rapidly draining off large currents, which may appear when an electrostatic discharge occurs between two pads or two terminals of the package, and in case of an overvoltage on a terminal of a device connected to a circuit.
FIG. 2 shows the electric diagram of an example of a protection structure 10, associated with an input-output pad 3 of an integrated circuit. A block 11 connected to pad 3 and to positive and negative power supply rails 5 and 7 symbolizes circuit elements protected by structure 10 against possible electrostatic discharges.
A diode 12 is forward-connected between pad 3 and positive supply rail 5. A diode 13 is reverse-connected between pad 3 and negative supply rail 7. A MOS transistor 15, used as a switch, is connected between rails 5 and 7. An overvoltage detection circuit 17, connected in parallel on MOS transistor 15, provides this transistor with a trigger signal. Overvoltage detection circuit 17 may, for example, be an edge detector comprising a resistor in series with a capacitor, the connection node between the resistor and the capacitor switching state in the occurrence of an abrupt overvoltage. MOS transistor 15 especially comprises a parasitic diode 16 forward-connected between rail 7 and rail 5.
The operation of protection structure 10 in case of an overvoltage occurring on an input-output pad (now simply called “pad”) or on a pad connected to a power supply rail (now simply called “rail”) will be disclosed hereafter.
In normal operation, when the chip is powered, that is, when rail 5 is positive with respect to rail 7 and the input-output pads are at an intermediary level, diodes 12 and 13 are both reverse-biased and conduct no current. Further, detection circuit 17 turns off MOS transistor 15.
In case of a positive overvoltage between positive and negative supply rails 5 and 7, circuit 17 turns on transistor 15, which removes the overvoltage.
In case of a negative overvoltage between rails 5 and 7, parasitic diode 16 of transistor 15 turns on and the overvoltage is removed.
In case of a positive overvoltage between a pad 3 and positive supply rail 5, diode 12 turns on and the overvoltage is removed.
In case of a negative overvoltage between a pad 3 and rail 5, circuit 17 turns on transistor 15, and the overvoltage is removed through transistor 15 and diode 13.
In case of a positive overvoltage between a pad 3 and negative supply rail 7, diode 12 turns on and the positive overvoltage is transferred onto rail 5, which corresponds to the above-discussed case of a positive overvoltage between rails 5 and 7.
In case of a negative overvoltage between a pad 3 and negative supply rail 7, diode 13 turns on and the overvoltage is removed.
In case of an overvoltage between two pads 3, diode 12 associated with most positive pads turn on, and the overvoltage is transferred to positive supply rail 5. This corresponds to the above-discussed case of a negative overvoltage between a pad 3 (the most negative pad) and rail 5.
A disadvantage of such a protection structure lies in the fact that diodes 12 and 13 have significant stray capacitances. In normal operation, the characteristics of the input/output signals of the circuit are degraded by such stray capacitances.
Further, to be able to drain off the currents induced by electrostatic discharges, diodes 12 and 13 should have a significant surface area (typically, a junction perimeter of 200 μm per diode). As a result, ring 9 (FIG. 1) takes up a significant silicon surface area, to the detriment of central portion 1 of the chip.
Further, diodes 12 and 13 are separate components, which makes the manufacturing of ring 9 more complex. The separate components should further be insulated from one another, which increases the total silicon surface area of an integrated circuit.